{"schema_version":"0.1","map_id":"paper-54-map","publication_id":54,"publication_anchor":"paper-54","slug":"paper-54","canonical_path":"/knowledge/papers/paper-54/","machine_path":"/knowledge/papers/paper-54.json","root_node_id":"paper-54","stage":"mapped_draft","contribution_type_vocabulary_version":"0.1","contribution_types":["protocol","primitive"],"title":"APEX: A Verified Architecture for Proofs of Execution on Remote Devices Under Full Software Compromise","short_title":"APEX","year":2020,"status":"Published","venue":"29th USENIX Security Symposium","topic":"secure-systems-networks","labels":["Theory","Applied"],"authors":["Ivan De Oliveira Nunes","Karim Eldefrawy","Norrathep Rattanavipanon","Gene Tsudik"],"keywords":["proof of execution","remote attestation","embedded systems","formal verification"],"research_question":"Can a low-end embedded device under complete software compromise prove to a remote verifier that specified software ran atomically and produced an authentic fresh output?","central_answer":"APEX defines a proof-of-execution security game and extends the verified VRASED attestation architecture with hardware-enforced execution, output, and metadata invariants. The design is model checked, implemented on OpenMSP430 and an FPGA, released as an artifact, and evaluated with low measured hardware overhead.","curation":{"drafted_at":"2026-07-11","drafted_by":[{"actor_type":"ai","name":"OpenAI Codex","role":"full-text extraction, formal-and-empirical evidence mapping, and initial assessment"}],"method":"Complete review of the 18-page checked-in USENIX paper, including security definitions, architecture, LTL specifications, proof argument, implementation, evaluation, limitations, and visual inspection of the title and formal-specification pages. The map keeps guarantees about execution distinct from correctness of the executed software.","source_scope":"full_source_audit","approval":{"status":"pending","note":"AI-authored source map awaiting full author verification. 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Security forbids convincing the verifier after no or incomplete execution and forbids substituting a tampered output for the actual execution result.","source_anchor_ids":["anchor-paper-54-pox-definition"]},{"id":"paper-54-scope","kind":"threat_model","parent_id":"paper-54","order":4,"epistemic_status":"defined","title":"Full software compromise","summary":"The adversary controls all device software, writable state, and DMA, and may read any memory not hardware-protected. It cannot change ROM, violate the assumed CPU semantics, induce physical faults, or extract secrets through physical side channels.","source_anchor_ids":["anchor-paper-54-adversary","anchor-paper-54-machine"]},{"id":"paper-54-scope-correctness","kind":"limitation","parent_id":"paper-54-scope","order":1,"epistemic_status":"explicitly_scoped","title":"Execution is not program correctness","summary":"A valid APEX proof says the requested code ran under the defined conditions and produced the authenticated bytes; it does not establish that the code is bug-free, functionally correct, or safe on malicious inputs.","source_anchor_ids":["anchor-paper-54-pox-definition","anchor-paper-54-limitations"]},{"id":"paper-54-architecture-node","kind":"protocol","parent_id":"paper-54","order":5,"epistemic_status":"specified","title":"APEX protocol","summary":"The verifier supplies code or identifies preinstalled code, memory bounds, and a fresh challenge. Hardware enforces atomic execution and sets EXEC only after success; VRASED then computes an HMAC-based proof over code, output, and metadata.","source_anchor_ids":["anchor-paper-54-architecture"]},{"id":"paper-54-architecture-execution","kind":"mechanism","parent_id":"paper-54-architecture-node","order":1,"epistemic_status":"hardware_enforced","title":"Execution and output protection","summary":"The verified logic rejects interrupted execution, entry or exit at the wrong boundary, DMA or software modification of protected regions, and changes to the executable or output between completion and proof generation.","source_anchor_ids":["anchor-paper-54-subproperties"]},{"id":"paper-54-architecture-metadata","kind":"mechanism","parent_id":"paper-54-architecture-node","order":2,"epistemic_status":"hardware_enforced","title":"Protected metadata and freshness","summary":"Hardware makes the EXEC flag software read-only and protects challenge and region bounds; including the fresh challenge in key derivation and the MAC binds the proof to the current request.","source_anchor_ids":["anchor-paper-54-architecture","anchor-paper-54-subproperties"]},{"id":"paper-54-formal","kind":"evidence_group","parent_id":"paper-54","order":6,"epistemic_status":"machine_checked","title":"Formal evidence","summary":"APEX subproperties are expressed in linear temporal logic, translated into a finite-state hardware model, and checked with NuSMV; the security argument composes these invariants with VRASED remote-attestation security.","source_anchor_ids":["anchor-paper-54-formal"]},{"id":"paper-54-claim-security","kind":"claim","parent_id":"paper-54-formal","order":1,"epistemic_status":"proved_under_assumptions","title":"PoX security under the stated MCU model","summary":"The paper argues that satisfying the verified execution, output, and metadata properties reduces a successful PoX forgery to breaking VRASED's attestation guarantee, under the cryptographic and machine assumptions.","source_anchor_ids":["anchor-paper-54-pox-definition","anchor-paper-54-formal"]},{"id":"paper-54-implementation","kind":"artifact_group","parent_id":"paper-54","order":7,"epistemic_status":"implemented","title":"Hardware and software implementation","summary":"The authors implement APEX on OpenMSP430, synthesize the design for an Artix-7 FPGA, reuse VRASED's protected attestation software, and publish the implementation.","source_anchor_ids":["anchor-paper-54-evaluation","anchor-paper-54-code"]},{"id":"paper-54-evidence-overhead","kind":"evidence","parent_id":"paper-54-implementation","order":1,"epistemic_status":"measured","title":"Hardware, memory, and verification cost","summary":"Relative to VRASED, APEX adds 44 registers and 302 lookup tables, reported as about 2 percent and 12 percent respectively, plus 9 bytes of metadata RAM. Model checking takes about three minutes and 280 MB on the reported workstation.","source_anchor_ids":["anchor-paper-54-evaluation"]},{"id":"paper-54-evidence-runtime","kind":"evidence","parent_id":"paper-54-implementation","order":2,"epistemic_status":"measured","title":"Runtime boundary","summary":"The hardware monitor adds no instructions to the protected program; proof latency is the program's own execution plus VRASED attestation, reported around 900 ms on an 8 MHz device for the evaluated configuration.","source_anchor_ids":["anchor-paper-54-evaluation"]},{"id":"paper-54-case-study","kind":"demonstration","parent_id":"paper-54","order":8,"epistemic_status":"proof_of_concept","title":"Authenticated sensing and actuation","summary":"A fire-sensor prototype on an APEX-enabled MSP430 and FPGA binds temperature or humidity reads and buzzer actuation to specified code, illustrating how a verifier can detect spoofed software outputs in the model.","source_anchor_ids":["anchor-paper-54-case-study"]},{"id":"paper-54-boundaries","kind":"limitation_group","parent_id":"paper-54","order":9,"epistemic_status":"material","title":"Limitations","summary":"Physical attacks and CPU-design faults are outside scope; code with external shared-library calls must be made self-contained; self-modifying code violates immutability; and atomic execution currently rejects interrupts, creating a real-time compatibility problem.","source_anchor_ids":["anchor-paper-54-adversary","anchor-paper-54-limitations"]},{"id":"paper-54-artifacts","kind":"artifact_group","parent_id":"paper-54","order":10,"epistemic_status":"evaluated_artifact","title":"Public and evaluated artifact","summary":"The paper, source repository, and official USENIX record are public, and the paper carries an Artifact Evaluated - Passed badge. This map did not independently rebuild the repository.","source_anchor_ids":["anchor-paper-54-code","anchor-paper-54-publication"]},{"id":"paper-54-scrutiny","kind":"scrutiny","parent_id":"paper-54","order":11,"epistemic_status":"venue_and_artifact_reviewed","title":"External scrutiny","summary":"APEX appeared at USENIX Security 2020 and passed the venue's represented artifact evaluation. Public review reports and independent formal re-verification are not linked.","source_anchor_ids":["anchor-paper-54-publication"]},{"id":"paper-54-lineage","kind":"lineage","parent_id":"paper-54","order":12,"epistemic_status":"documented","title":"Extension of VRASED","summary":"APEX deliberately reuses VRASED's verified remote-attestation root and adds a proof-of-execution layer without changing the protected attestation routine, so the two services can coexist.","source_anchor_ids":["anchor-paper-54-architecture","anchor-paper-54-formal"]}],"relations":[{"id":"paper-54-relation-answer-question","type":"addresses","from_id":"paper-54-answer","to_id":"paper-54-question"},{"id":"paper-54-relation-pox-answer","type":"defines","from_id":"paper-54-pox","to_id":"paper-54-answer"},{"id":"paper-54-relation-execution-architecture","type":"component_of","from_id":"paper-54-architecture-execution","to_id":"paper-54-architecture-node"},{"id":"paper-54-relation-metadata-architecture","type":"component_of","from_id":"paper-54-architecture-metadata","to_id":"paper-54-architecture-node"},{"id":"paper-54-relation-formal-security","type":"supports","from_id":"paper-54-formal","to_id":"paper-54-claim-security"},{"id":"paper-54-relation-implementation-answer","type":"realizes","from_id":"paper-54-implementation","to_id":"paper-54-answer"},{"id":"paper-54-relation-case-study-answer","type":"demonstrates","from_id":"paper-54-case-study","to_id":"paper-54-answer"},{"id":"paper-54-relation-scope-security","type":"qualifies","from_id":"paper-54-scope","to_id":"paper-54-claim-security"},{"id":"paper-54-relation-boundaries-security","type":"qualifies","from_id":"paper-54-boundaries","to_id":"paper-54-claim-security"},{"id":"paper-54-relation-lineage-architecture","type":"contextualizes","from_id":"paper-54-lineage","to_id":"paper-54-architecture-node"}],"assessment":{"id":"paper-54-assessment-2026-07-11","rubric_version":"0.2","assessed_at":"2026-07-11","status":"ai_draft_author_review_pending","note":"These dimensions describe documented support and process, not truth, correctness, or a universal ranking. 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